RC82562EP Intel, RC82562EP Datasheet - Page 66

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

Host Software Interface
6.4.1.1
6.4.1.1.1
6.4.1.1.2
58
Figure 14. General Action Command Format
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
General Action Command Format
The format common to all action commands and the algorithms for beginning and completing the
execution (also common to all action commands) is described below.
The general format of the Command Block (CB) includes the following fields:
Beginning Execution
An action command can be started by either the CU start or CU resume control command.
Otherwise, it may follow a previous action command. However, the actual command start may be
delayed by RU activity.
The following sequence is performed by the CU at the beginning of execution of each action
command:
If the commands are chained, the CU prefetches the next command block by accessing the address
specified in the link offset field of the current CB. The device reads, analyzes, and saves the
command word of the next CB (the following fields are saved for later use: EL, S, I and CMD).
Completing Execution
Command completion time is asynchronous to the beginning of the command. It is determined by
the command type, RU activity, CU control commands, bus latency, etc. The CU is always in the
active state at this time. The EL, S, and I bits determine the next actions.
The following sequence is performed by the CU at the completion of execution of an action
command:
00h
04h
08h
1. The device reads 4 Dwords of the CB in one continuous PCI burst (if possible).
2. The device analyzes the contents of the command word to determine the necessary action.
3. The device reads and analyzes the link offset of the next CB and saves it.
4. The device performs specific actions according to the action command specified in the current
1. The devices writes command specific status to the status word of the current CB (usually the C
2. If the I bit is set, the device sets a request for the CX interrupt.
3. If the EL bit is set, after completion of the command the CU becomes idle. If the S bit is set,
Offset
command field.
and OK bits are written to). If the command is a transmit command, the C and OK bits are
updated when the last transmit buffer DMA has completed, not after the actual transfer of the
frame on the serial link. This allows the transmit buffer resources to be returned as soon as the
data is copied into the device internal transmit FIFO instead of waiting for actual transmission
on the wire. Transmit status is kept in the transmit statistical counters of the device.
the CU becomes suspended. Otherwise, the CU requests the beginning of the next action
EL
Link Offset
Optional Address and Data Fields
S
Command Word Bits 31:16
I
0000000000
CMD
C
X
Status Word Bits 15:0
OK
XXXXXXXXXXXXX