RC82562EP Intel, RC82562EP Datasheet - Page 150
RC82562EP
Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Specifications of RC82562EP
Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361
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Wake-up Functionality
A.5
A.6
142
Table 63. Fixed Wake-up Configuration Bits
Note: In the 82558 B-step, there is no indication to differentiate this event from any other wake-up event.
Link Status Event
The controller may be configured to wake up the system on link disconnect and connect events.
The link status wake-up enable bit was added to the configuration command for the 82558 and later
generation devices. If this bit is set, the device generates a power management event when it
detects a link disconnect or connect. A link status event is indicated through the Power
Management Driver Register (PMDR).
Frame storage is also not associated with it.
Flexible Packet Filtering
Programmable packet filtering is targeted to support wake-up packets that are not supported by the
hardware filters. Known wake-up packets are listed below.
Wake-up packets supported by the hardware filters are:
Wake-up packets not supported by hardware filters are:
Multicast Match Wake
Enable
IP Address Low Byte
IP Address High Byte
IA Match Wake Enable
Magic Packet Wake-up
Disable
•
•
•
•
•
•
•
•
ARP packets at EII packet with single IP address filtering
Directed packet
Multicast Address
Magic Packet
Link event
Directed IP packet
Net BIOS queries
802.2 ARP
Configuration Bit
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
This bit enables assertion of the PME# signal upon reception of packets that
pass through the multicast address filtering. The PME# signal is further gated by
the PME enable bit in the PMCSR.
These bits are used for ARP frame filtering. These are the least significant bits
that make the low byte of the IP address, which is located in byte number 40 in a
packet without a VLAN header and byte number 44 in a packet with a VLAN
header.
These bits are used for ARP frame filtering. They make the high byte of the IP
address, which is located in byte number 41 in a packet without a VLAN header
and byte number 45 in a packet with a VLAN header.
This bit enables the assertion of the PME# signal upon reception of packets that
pass through the Individual Address filtering. The PME# signal is further gated
by the PME enable bit in the PMCSR.
This bit disables wake up upon reception of a Magic Packet frame.
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