PIC24FJ64GA006-I/PT Microchip Technology Inc., PIC24FJ64GA006-I/PT Datasheet - Page 133

• Manufacturer Part Number: PIC24FJ64GA006-I/PT
• Description: 64 PIN, 64KB FLASH, 8 KB RAM, 53 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA006-I/PT

• A/d Inputs: 16 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 53
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 53
• Number Of Pins: 64
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 16 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

16.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the PIC24 device family. The UART is a full-
duplex asynchronous system that can communicate
with peripheral devices, such as personal computers,
LIN, RS-232 and RS-485 interfaces. The module also
supports a hardware flow control option with the
UxCTS and UxRTS pins and also includes an IrDA
encoder and decoder.
The primary features of the UART module are:
• Full-Duplex 8 or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
FIGURE 16-1:
© 2006 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
UxRTS pins
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of this group of PIC24FJ devices. It is not
intended to be a comprehensive reference
source.
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
UARTx Transmitter
UARTx Receiver
IrDA
®
Preliminary
PIC24FJ128GA FAMILY
• Fully Integrated Baud Rate Generator with 16-bit
• Baud Rates Ranging from 1 Mbps to 15 bps at
• 4-Deep First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA Encoder and Decoder Logic
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 16-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
Prescaler
16 MIPS
Buffer
(9th bit = 1)
BCLKx
UxRTS
UxCTS
UxRX
UxTX
DS39747C-page 131