PIC24FJ64GA006-I/PT Microchip Technology Inc., PIC24FJ64GA006-I/PT Datasheet - Page 194

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PIC24FJ64GA006-I/PT

Manufacturer Part Number
PIC24FJ64GA006-I/PT
Description
64 PIN, 64KB FLASH, 8 KB RAM, 53 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ64GA006-I/PT

A/d Inputs
16 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
I2C/SPI/UART
Memory Capacity
64 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
53
Number Of Pins
64
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Speed
16 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC24FJ64GA006-I/PT
0
PIC24FJ128GA FAMILY
TABLE 24-2:
DS39747C-page 192
BTSS
BTST
BTSTS
CALL
CLR
CLRWDT
COM
CP
CP0
CP1
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC2
DISI
DIV
EXCH
Mnemonic
Assembly
BTSS
BTSS
BTST
BTST.C
BTST.Z
BTST.C
BTST.Z
BTSTS
BTSTS.C
BTSTS.Z
CALL
CALL
CLR
CLR
CLR
CLRWDT
COM
COM
COM
CP
CP
CP
CP0
CP0
CP1
CP1
CPB
CPB
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC
DEC
DEC2
DEC2
DEC2
DISI
DIV.SW
DIV.SD
DIV.UW
DIV.UD
EXCH
INSTRUCTION SET OVERVIEW (CONTINUED)
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
Ws,#bit4
lit23
Wn
f
WREG
Ws
f
f,WREG
Ws,Wd
f
Wb,#lit5
Wb,Ws
f
Ws
f
Ws
f
Wb,#lit5
Wb,Ws
Wb,Wn
Wb,Wn
Wb,Wn
Wb,Wn
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
#lit14
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wns,Wnd
Assembly Syntax
Bit Test f, Skip if Set
Bit Test Ws to C
Bit Test Ws to Z
Bit Test then Set f
Bit Test Ws to Z, then Set
Call Subroutine
Call Indirect Subroutine
f = 0x0000
Ws = 0x0000
f = f
WREG = f
Wd = Ws
Compare f with WREG
Compare Wb with lit5
Compare Wb with Ws (Wb – Ws)
Compare f with 0x0000
Compare Ws with 0x0000
Compare f with 0xFFFF
Compare Ws with 0xFFFF
Compare f with WREG, with Borrow
Compare Wb with lit5, with Borrow
Compare Wb with Ws, with Borrow
Compare Wb with Wn, Skip if =
Compare Wb with Wn, Skip if >
Compare Wb with Wn, Skip if <
Compare Wb with Wn, Skip if ≠
Wn = Decimal Adjust Wn
f = f –1
WREG = f –1
Wd = Ws – 1
f = f – 2
WREG = f – 2
Wd = Ws – 2
Disable Interrupts for k Instruction Cycles
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Swap Wns with Wnd
Bit Test Ws, Skip if Set
Bit Test f
Bit Test Ws<Wb> to C
Bit Test Ws<Wb> to Z
Bit Test Ws to C, then Set
WREG = 0x0000
Clear Watchdog Timer
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Preliminary
(Wb – Ws – C)
Description
© 2006 Microchip Technology Inc.
Words
# of
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
# of
18
18
18
18
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
None
None
Z
C
Z
C
Z
Z
C
Z
None
None
None
None
None
WDTO, Sleep
N, Z
N, Z
N, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
None
None
None
C
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
N, Z, C, OV
N, Z, C, OV
N, Z, C, OV
N, Z, C, OV
None
Status Flags
Affected

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