PIC24FJ64GA006-I/PT Microchip Technology Inc., PIC24FJ64GA006-I/PT Datasheet - Page 170

• Manufacturer Part Number: PIC24FJ64GA006-I/PT
• Description: 64 PIN, 64KB FLASH, 8 KB RAM, 53 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA006-I/PT

• A/d Inputs: 16 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 53
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 53
• Number Of Pins: 64
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 16 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC24FJ128GA FAMILY
REGISTER 20-2:
DS39747C-page 168
Upper Byte:
bit 15
bit 15-13 VCFG2:VCFG0: Voltage Reference Configuration bits:
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG2
R/W-0
Reserved: User should write ‘0’ to this location
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ S/H Input for MUX A Input Multiplexer Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (Valid only when BUFM = 1)
1 = A/D is currently filling buffer 08-0F, user should access data in 00-07
0 = A/D is currently filling buffer 00-07, user should access data in 08-0F
Unimplemented: Read as ‘0’
SMPI3:SMPI0: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16th sample/convert sequence
1110 = Interrupts at the completion of conversion for each 15th sample/convert sequence
.....
0001 = Interrupts at the completion of conversion for each 2nd sample/convert sequence
0000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers (ADC1BUFn<15:8> and ADC1BUFn<7:0>)
0 = Buffer configured as one 16-word buffer (ADC1BUFn<15:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for first sample, then alternates between MUX B and MUX A
0 = Always use MUX A input multiplexer settings
Legend:
R = Readable bit
-n = Value at POR
VCFG1
VCFG2:VCFG0
R/W-0
input multiplexer settings for all subsequent samples
Lower Byte:
bit 7
000
001
010
011
1xx
BUFS
R-0
AD1CON2: A/D CONTROL REGISTER 2
VCFG0
R/W-0
U-0
—
W = Writable bit
‘1’ = Bit is set
External V
External V
U-0
r
SMPI3
R/W-0
AV
AV
AV
V
R
DD
DD
DD
+
REF
REF
Preliminary
+ pin
+ pin
U-0
—
SMPI2
R/W-0
CSCNA
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
External V
External V
SMPI1
R/W-0
AV
AV
AV
V
R
U-0
SS
SS
SS
—
-
REF
REF
SMPI0
R/W-0
- pin
- pin
© 2006 Microchip Technology Inc.
U-0
x = Bit is unknown
—
bit 8
R/W-0
BUFM
R/W-0
ALTS
bit 0