PIC24FJ64GA006-I/PT Microchip Technology Inc., PIC24FJ64GA006-I/PT Datasheet - Page 139

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PIC24FJ64GA006-I/PT

Manufacturer Part Number
PIC24FJ64GA006-I/PT
Description
64 PIN, 64KB FLASH, 8 KB RAM, 53 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ64GA006-I/PT

A/d Inputs
16 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
I2C/SPI/UART
Memory Capacity
64 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
53
Number Of Pins
64
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Speed
16 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC24FJ64GA006-I/PT
0
REGISTER 16-2:
© 2006 Microchip Technology Inc.
bit 4
bit 3
bit 2
bit 1
bit 0
Upper Byte:
UTXISEL1 UTXINV
bit 15
R/W-0
RIDLE: Receiver Idle bit (Read-Only)
1 = Receiver is Idle
0 = Receiver is active
PERR: Parity Error Status bit (Read-Only)
1 = Parity error has been detected for the current character (character at the top of the receive FIFO)
0 = Parity error has not been detected
FERR: Framing Error Status bit (Read-Only)
1 = Framing error has been detected for the current character (character at the top of the receive FIFO)
0 = Framing error has not been detected
OERR: Receive Buffer Overrun Error Status bit (Read/Clear-Only)
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed (clearing a previously set OERR bit (1 → 0 transition) will reset the
URXDA: Receive Buffer Data Available bit (Read-Only)
1 = Receive buffer has data, at least one more character can be read
0 = Receive buffer is empty
Legend:
R = Readable bit
-n = Value at Reset
receiver buffer and the RSR to the empty state)
R/W-0
Lower Byte:
URXISEL1 URXISEL0
bit 7
R/W-0
(1)
UxSTA: UARTx STATUS AND CONTROL REGISTER (CONTINUED)
UTXISEL0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
W = Writable bit
‘1’ = Bit is set
U-0
ADDEN
R/W-0
Preliminary
R/W-0 HC
UTXBRK
PIC24FJ128GA FAMILY
RIDLE
R-1
HS = Hardware Set
‘0’ = Bit is cleared
UTXEN
R/W-0
PERR
R-0
UTXBF
R-0
FERR
R-0
HC = Hardware Cleared
x = Bit is unknown
TRMT
R-1
bit 8
OERR
R/C-0
DS39747C-page 137
URXDA
R-0
bit 0

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