PIC24FJ64GA006-I/PT Microchip Technology Inc., PIC24FJ64GA006-I/PT Datasheet - Page 189

• Manufacturer Part Number: PIC24FJ64GA006-I/PT
• Description: 64 PIN, 64KB FLASH, 8 KB RAM, 53 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA006-I/PT

• A/d Inputs: 16 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 53
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 53
• Number Of Pins: 64
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 16 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

23.4
PIC24FJ128GA family devices implement a JTAG
interface, which supports boundary scan device testing
as well as in-circuit programming.
23.5
For all devices in the PIC24FJ128GA family of devices,
the on-chip program memory space is treated as a
single block. Code protection for this block is controlled
by one Configuration bit, GCP. This bit inhibits external
reads and writes to the program memory space. It has
no direct effect in normal execution mode.
23.5.1
The Configuration registers are protected against inad-
vertent or unwanted changes or reads in two ways. The
primary protection is the write-once feature of the
Configuration bits which prevents reconfiguration once
the bit has been programmed during a power cycle. To
safeguard against unpredictable events, Configuration
bit changes resulting from individual cell level disrup-
tions (such as ESD events) will cause a parity error and
trigger a device Reset.
The data for the Configuration registers is derived from
the Flash Configuration Words in program memory.
When the GCP bit is set, the source data for device
configuration is also protected as a consequence.
© 2006 Microchip Technology Inc.
JTAG Interface
Program Verification and
Code Protection
CONFIGURATION REGISTER
PROTECTION
Preliminary
PIC24FJ128GA FAMILY
23.6
PIC24FJ128GA family microcontrollers can be serially
programmed while in the end application circuit. This is
simply done with two lines for clock (PGCx) and data
(PGDx) and three other lines for power, ground and the
programming voltage. This allows customers to manu-
facture boards with unprogrammed devices and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
23.7
When MPLAB
In-Circuit Debugging functionality is enabled. This
function allows simple debugging functions when used
with MPLAB IDE. Debugging functionality is controlled
through the EMUCx (Emulation/Debug Clock) and
EMUDx (Emulation/Debug Data) pins.
To use the In-Circuit Debugger function of the device,
the design must implement ICSP connections to
MCLR,
EMUDx/EMUCx pin pair. In addition, when the feature
is enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of data RAM and two I/O pins.
In-Circuit Debugger
In-Circuit Serial Programming
V
DD
,
®
ICD 2 is selected as a debugger, the
V
SS
,
PGCx,
PGDx
DS39747C-page 187
and
the