PIC18F2450-I/ML Microchip Technology Inc., PIC18F2450-I/ML Datasheet - Page 138

• Manufacturer Part Number: PIC18F2450-I/ML
• Description: Microcontroller; 16 KB Flash; 768 RAM; 0 EEPROM; 23 I/O; 28-Pin-QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2450-I/ML

• A/d Inputs: 10-Channel, 10-Bit
• Cpu Speed: 12 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 23
• Interface: EUSART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 2-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2450/4450
14.2.5
The USB Address register contains the unique USB
address that the peripheral will decode when active.
UADDR is reset to 00h when a USB Reset is received,
indicated by URSTIF, or when a Reset is received from
the microcontroller. The USB address must be written
by the microcontroller during the USB setup phase
(enumeration) as part of the Microchip USB firmware
support.
14.2.6
The Frame Number registers contain the 11-bit frame
number. The low-order byte is contained in UFRML,
while the three high-order bits are contained in
UFRMH. The register pair is updated with the current
frame number whenever a SOF token is received. For
the microcontroller, these registers are read-only. The
Frame
isochronous transfers.
14.3
USB data moves between the microcontroller core and
the SIE through a memory space known as the USB
RAM. This is a special dual port memory that is
mapped into the normal data memory space in Bank 4
(400h to 4FFh) for a total of 256 bytes (Figure 14-5).
Some portion of Bank 4 (400h through 4FFh) is used
specifically for endpoint buffer control, while the
remaining portion is available for USB data. Depending
on the type of buffering being used, all but 8 bytes of
Bank 4 may also be available for use as USB buffer
space.
Although USB RAM is available to the microcontroller
as data memory, the sections that are being accessed
by the SIE should not be accessed by the
microcontroller. A semaphore mechanism is used to
determine the access to a particular buffer at any given
time. This is discussed in Section 14.4.1.1 “Buffer
Ownership”.
DS39760A-page 136
Number
USB RAM
USB ADDRESS REGISTER
(UADDR)
USB FRAME NUMBER REGISTERS
(UFRMH:UFRML)
register
is
primarily
Advance Information
used
for
FIGURE 14-5:
Banks 5
Bank 4
Banks 0
Banks 2
Bank15
to 14
to 1
to 3
USB Data or User Data
Buffer Descriptors,
IMPLEMENTATION OF
USB RAM IN DATA
MEMORY SPACE
© 2006 Microchip Technology Inc.
USB Data or
User Data
User Data
Unused
Unused
Unused
SFRs
1FFh
000h
200h
3FFh
400h
4FFh
500h
7FFh
800h
F00h
F80h
FFFh