PIC18F2450-I/ML Microchip Technology Inc., PIC18F2450-I/ML Datasheet - Page 188

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PIC18F2450-I/ML

Manufacturer Part Number
PIC18F2450-I/ML
Description
Microcontroller; 16 KB Flash; 768 RAM; 0 EEPROM; 23 I/O; 28-Pin-QFN
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2450-I/ML

A/d Inputs
10-Channel, 10-Bit
Cpu Speed
12 MIPS
Eeprom Memory
0 Bytes
Input Output
23
Interface
EUSART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
48 MHz
Timers
1-8-bit, 2-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2450-I/ML
Manufacturer:
TOSHIBA
Quantity:
2 000
PIC18F2450/4450
FIGURE 17-3:
17.5
In many applications, the ability to detect a drop below
or rise above a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect Universal Serial Bus (USB) attach or
detach. This assumes the device is powered by a lower
voltage source than the USB when detached. An attach
would indicate a high-voltage detect from, for example,
3.3V to 5V (the voltage on USB) and vice versa for a
detach. This feature could save a design a few extra
components and an attach signal (input pin).
For general battery applications, Figure 17-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage,
V
The interrupt could cause the execution of an ISR,
which would allow the application to perform “house-
keeping tasks” and perform a controlled shutdown
before the device voltage exits the valid operating
range at T
tion a time window, represented by the difference
between T
DS39760A-page 186
A
, the HLVD logic generates an interrupt at time, T
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
Applications
A
B
. The HLVD, thus, would give the applica-
and T
HLVDIF
HLVDIF
IRVST
IRVST
V
V
B
DD
DD
, to safely exit.
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG =
HLVDIF may not be set
Internal Reference is stable
Advance Information
Internal Reference is stable
T
T
IRVST
IRVST
A
.
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
FIGURE 17-4:
V
V
A
B
Legend:
HLVDIF cleared in software
V
V
A
B
1
= HLVD trip point
= Minimum valid device
)
TYPICAL
HIGH/LOW-VOLTAGE
DETECT APPLICATION
operating voltage
© 2006 Microchip Technology Inc.
Time
HLVDIF cleared in software
T
A
V
V
HLVD
HLVD
T
B

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