PIC18F2320-I/SO Microchip Technology Inc., PIC18F2320-I/SO Datasheet - Page 137

• Manufacturer Part Number: PIC18F2320-I/SO
• Description: Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SOIC
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2320-I/SO

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SOIC
• Programmable Memory: 8K Bytes
• Ram Size: 512 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

15.3
In Capture mode, CCPR1H:CCPR1L captures the 16-bit
value of the TMR1 or TMR3 registers when an event
occurs on pin RC2/CCP1/P1A. An event is defined as
one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by control bits, CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit, CCP1IF (PIR1<2>), is set; it must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value is overwritten by the new captured value.
15.3.1
In Capture mode, the RC2/CCP1/P1A pin should be
configured as an input by setting the TRISC<2> bit.
15.3.2
The timers that are to be used with the capture feature
(either Timer1 and/or Timer3) must be running in Timer
mode or Synchronized Counter mode. In Asynchro-
nous Counter mode, the capture operation may not
work. The timer to be used with each CCP module is
selected in the T3CON register.
FIGURE 15-1:
 2003 Microchip Technology Inc.
Note:
Capture Mode
CCP1 pin
CCP2 pin
CCP PIN CONFIGURATION
If the RC2/CCP1/P1A is configured as an
output, a write to the port can cause a
capture condition.
TIMER1/TIMER3 MODE SELECTION
CAPTURE MODE OPERATION BLOCK DIAGRAM
Q’s
Edge Detect
Edge Detect
Q’s
Prescaler
Prescaler
1, 4, 16
1, 4, 16
and
and
CCP1CON<3:0>
CCP2CON<3:0>
Set Flag bit CCP2IF
Set Flag bit CCP1IF
PIC18F2220/2320/4220/4320
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP2
T3CCP2
15.3.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit, CCP1IF, following any such
change in operating mode.
15.3.4
There are four prescaler settings specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 15-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 15-1:
CLRF
MOVLW
MOVWF
CCP1CON, F
NEW_CAPT_PS
CCP1CON
SOFTWARE INTERRUPT
CCP PRESCALER
TMR1
Enable
TMR1
Enable
TMR3
Enable
TMR3
Enable
CCPR1H
CCPR2H
TMR1H
TMR1H
TMR3H
TMR3H
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn CCP module off
; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
CCPR1L
CCPR2L
TMR3L
TMR1L
TMR3L
TMR1L
DS39599C-page 135