PIC18F2320-I/SO Microchip Technology Inc., PIC18F2320-I/SO Datasheet - Page 227

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PIC18F2320-I/SO

Manufacturer Part Number
PIC18F2320-I/SO
Description
Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SOIC
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2320-I/SO

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
8K Bytes
Ram Size
512 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
20.7
When a comparator is active and the device is placed
in a power managed mode, the comparator remains
active and the interrupt is functional if enabled. This
interrupt will wake-up the device from a power
managed mode when enabled. Each operational com-
parator will consume additional current, as shown in
the comparator specifications. To minimize power
consumption while in a power managed mode, turn off
the comparators (CM<2:0> = 111) before entering the
power managed modes. If the device wakes up from a
power managed mode, the contents of the CMCON
register are not affected.
20.8
A device Reset forces the CMCON register to its Reset
state, causing the comparator module to be in the Com-
parator Reset mode (CM<2:0> = 111). This ensures
that all potential inputs are analog inputs. Device cur-
rent is minimized when digital inputs are present at
Reset time. The comparators will be powered down
during the Reset interval.
FIGURE 20-4:
 2003 Microchip Technology Inc.
Comparator Operation in Power
Managed Modes
Effects of a Reset
VA
Legend:
R
S
COMPARATOR ANALOG INPUT MODEL
< 10k
C
V
I
R
R
VA
A
LEAKAGE
PIN
T
IC
S
IN
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to various junctions
= Interconnect Resistance
= Source Impedance
= Analog Voltage
PIC18F2220/2320/4220/4320
V
DD
V
V
T
T
= 0.6V
= 0.6V
20.9
A simplified circuit for an analog input is shown in
Figure 20-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
more than 0.6V, one of the diodes is forward biased
and a latch-up condition may occur. A maximum source
impedance of 10 k
sources.
SS
and V
V
SS
SS
. Therefore, the analog input must be between
Analog Input Connection
Considerations
I
±500 nA
LEAKAGE
DD
. If the input voltage exceeds this range by
R
IC
is recommended for the analog
Comparator
Input
DS39599C-page 225
DD

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