PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 209

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PIC24F08KA102-E/ML

Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24F08KA102-E/ML

A/d Inputs
9 Channel, 10-bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin QFN
Programmable Memory
8K Bytes
Ram Size
1.5K Bytes
Speed
32 MHz
Temperature Range
–40 to 125 °C
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
TABLE 28-2:
© 2009 Microchip Technology Inc.
GOTO
INC
INC2
IOR
LNK
LSR
MOV
MUL
NEG
NOP
POP
PUSH
Mnemonic
Assembly
GOTO
GOTO
INC
INC
INC
INC2
INC2
INC2
IOR
IOR
IOR
IOR
IOR
LNK
LSR
LSR
LSR
LSR
LSR
MOV
MOV
MOV
MOV
MOV
MOV.b
MOV
MOV
MOV
MOV
MOV.D
MOV.D
MUL.SS
MUL.SU
MUL.US
MUL.UU
MUL.SU
MUL.UU
MUL
NEG
NEG
NEG
NOP
NOPR
POP
POP
POP.D
POP.S
PUSH
PUSH
PUSH.D
PUSH.S
INSTRUCTION SET OVERVIEW (CONTINUED)
Expr
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
#lit14
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
f,Wn
[Wns+Slit10],Wnd
f
f,WREG
#lit16,Wn
#lit8,Wn
Wn,f
Wns,[Wns+Slit10]
Wso,Wdo
WREG,f
Wns,Wd
Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,#lit5,Wnd
f
f
f,WREG
Ws,Wd
f
Wdo
Wnd
f
Wso
Wns
Assembly Syntax
Go to Address
Go to Indirect
f = f + 1
WREG = f + 1
Wd = Ws + 1
f = f + 2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Link Frame Pointer
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Move f to Wn
Move [Wns+Slit10] to Wnd
Move f to f
Move f to WREG
Move 16-bit Literal to Wn
Move 8-bit Literal to Wn
Move Wn to f
Move Wns to [Wns+Slit10]
Move Ws to Wd
Move WREG to f
Move Double from W(ns):W(ns+1) to Wd
Move Double from Ws to W(nd+1):W(nd)
{Wnd+1, Wnd} = Signed(Wb) * Signed(Ws)
{Wnd+1, Wnd} = Signed(Wb) * Unsigned(Ws)
{Wnd+1, Wnd} = Unsigned(Wb) * Signed(Ws)
{Wnd+1, Wnd} = Unsigned(Wb) * Unsigned(Ws)
{Wnd+1, Wnd} = Signed(Wb) * Unsigned(lit5)
{Wnd+1, Wnd} = Unsigned(Wb) * Unsigned(lit5)
W3:W2 = f * WREG
f = f + 1
WREG = f + 1
Wd = Ws + 1
No Operation
No Operation
Pop f from Top-of-Stack (TOS)
Pop from Top-of-Stack (TOS) to Wdo
Pop from Top-of-Stack (TOS) to W(nd):W(nd+1)
Pop Shadow Registers
Push f to Top-of-Stack (TOS)
Push Wso to Top-of-Stack (TOS)
Push W(ns):W(ns+1) to Top-of-Stack (TOS)
Push Shadow Registers
Preliminary
PIC24F16KA102 FAMILY
Description
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
# of
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
2
1
DS39927B-page 207
None
None
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
N, Z
N, Z
N, Z
N, Z
N, Z
None
C, N, OV, Z
C, N, OV, Z
C, N, OV, Z
N, Z
N, Z
None
None
N, Z
N, Z
None
None
None
None
None
N, Z
None
None
None
None
None
None
None
None
None
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
None
None
None
None
All
None
None
None
None
Status Flags
Affected

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