PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 58

no-image

PIC24F08KA102-E/ML

Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24F08KA102-E/ML

A/d Inputs
9 Channel, 10-bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin QFN
Programmable Memory
8K Bytes
Ram Size
1.5K Bytes
Speed
32 MHz
Temperature Range
–40 to 125 °C
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
PIC24F16KA102 FAMILY
6.4.3
To read a word from data EEPROM, the table read
instruction is used. Since the EEPROM array is only
16 bits wide, only the TBLRDL instruction is needed.
The read operation is performed by loading TBLPAG
and WREG with the address of the EEPROM location
followed by a TBLRDL instruction.
EXAMPLE 6-5:
DS39927B-page 56
int __attribute__ ((space(eedata))) eeData = 0x1234;
int data;
unsigned int offset;
// Set up a pointer to the EEPROM location to be erased
TBLPAG = __builtin_tblpage(&eeData);
offset = __builtin_tbloffset(&eeData);
data = __builtin_tblrdl(offset);
READING THE DATA EEPROM
READING THE DATA EEPROM USING THE TBLRD COMMAND
// Data read from EEPROM
Preliminary
A typical read sequence, using the Table Pointer manage-
ment (builtin_tblpage and builtin_tbloffset)
and table read (builtin_tblrdl) procedures from the
C30 compiler library, is provided in Example 6-5.
Program Space Visibility (PSV) can also be used to
read locations in the data EEPROM.
// Variable located in EEPROM
// Initialize EE Data page pointer
// Initizlize lower word of address
// Write EEPROM data to write latch
© 2009 Microchip Technology Inc.

Related parts for PIC24F08KA102-E/ML