VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 109

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

6.6.4
Table 93.
6.6.5
Table 94.
Revision 4.3
August 2009
JTAG
The following table lists the device pins associated with the device JTAG testing facility.
JTAG Pins
Miscellaneous
The following table lists the device pins associated with a particular interface or facility
on the device.
Miscellaneous Pins
Pin
6
5
9
10
11
Pin
60
59
58
57
56
95
94
71
62
63
64
65
81
80
Name
CMODE4
CMODE3
CMODE2
CMODE1
CMODE0
XTAL1/REFCLK
XTAL2
PLLMODE
LED3
LED2
LED1
LED0
REF_REXT
REF_FILT
Name
TDI
TDO
TMS
TCK
NTRST
O
Type
A
A
CRYST
BIAS
BIAS
I
O
I
I
A
Type
I
I
I
I
PU5V
PU5V
PU5V
PU5V
Description
Configuration mode (CMODE) pins. For more information,
see
Crystal oscillator input. If OSCEN=high, then a 25 MHz
parallel resonant crystal with ±50 ppm frequency tolerance
should be connected across XTAL1 and XTAL2. A 33 pF
capacitor should also tie the XTAL1 pin to ground.
Reference clock input. If OSCEN=low, the clock input
frequency can either be 25 MHz (PLLMODE=0) or 125 MHz
(PLLMODE is high).
Crystal oscillator output. The crystal should be connected
across XTAL1 and XTAL2. A 33 pF capacitor should also tie
the XTAL2 pin to ground. If not using a crystal oscillator,
this output pin can be left floating if driving XTAL1/REFCLK
with a reference clock.
PLL mode input select. Sampled on power-up or reset. If
PLLMODE is low, then REFCLK must be 25 MHz. If
PLLMODE is high, then REFCLK must be 125 MHz.
If a crystal or an external 25 MHz clock is used, PLLMODE
must be pulled low. If an external 125 MHz clock is used,
PLLMODE must be pulled high.
LED direct-drive outputs. All LED pins are active-low. For
more information about LED operation, see
Interface,”
Reference external connects to an external 2 kΩ (1%)
resistor to analog ground.
Reference filter connects to an external 1 μF capacitor to
analog ground.
O
“CMODE,”
Description
JTAG test serial data input.
JTAG test serial data output.
JTAG test mode select.
JTAG test clock input.
JTAG reset. If JTAG is not used, then tie this pin
to VSS (ground) with a pull-down resistor.
page 31.
page 68.
VSC8641 Datasheet
Pin Descriptions
“LED
Page 109