VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 55

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VSC8641XKO

Manufacturer Part Number
VSC8641XKO
Description
IC PHY 10/100/1000 100-LQFP
Manufacturer
Vitesse Semiconductor Corp
Type
PHY Transceiverr
Datasheets

Specifications of VSC8641XKO

Number Of Drivers/receivers
1/1
Protocol
Gigabit Ethernet
Voltage - Supply
2.5V, 3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Case
TQFP
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
907-1031

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Table 29.
4.2.23
Table 30.
Revision 4.3
August 2009
Interrupt Mask, Address 25 (0x19) (continued)
Note
pin reflects the state of bit 26.15. Clearing this bit only inhibits the MDINT pin from
being asserted.
Interrupt Status
The status of interrupts already written to the device are available for reading from
register 26 in the main registers space. The following table lists the readouts you can
expect.
Interrupt Status, Address 26 (0x1A)
The following information applies to the interrupt status bits:
Bit
2
1
0
Bit
15
14
13
12
11
10
9
8:3
2
1
0
All set bits in this register are cleared after being read (self-clearing). If bit 26.15 is
set, the cause of the interrupt can be read by reading bits 26.14:0.
For bits 26.14 and 26.12, bit 0.12 must be set for this interrupt to assert.
For bit 26.2, bits 4.8:5 must be set for this interrupt to assert.
Name
Link speed downshift detect mask
Master/Slave resolution error mask
Reserved
Name
Interrupt status
Speed state change status
Link state change status
FDX state change status
Auto-negotiation error status
Auto-negotiation complete status
Inline powered device detect status
Reserved
Link speed downshift detect status
Master/Slave resolution error status
Reserved
When bit 25.15 is set, the MDINT pin is enabled. When enabled, the state of this
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Access
R/W
R/W
RO
Description
This is a self-clearing bit.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
1 = Interrupt pending.
This is a self-clearing bit.
1 = Interrupt pending.
Description
This is a sticky bit.
1 = Enabled.
This is a sticky bit.
1 = Enabled.
VSC8641 Datasheet
Configuration
Default
Default
Page 55
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