VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 39

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

Table 4.
Table 5.
3.13.9
Revision 4.3
August 2009
IDCODE Provides the version number (bits 31:28), part number (bits 27:12), and the
manufacturer identity (bits 11:1) to be serially read from the device.
The following table provides information about the meaning of IDCODE binary values
stored in the device JTAG registers.
JTAG Device Identification Register Description
CLAMP Allows the state of the signals driven from the component pins to be
determined from the boundary-scan register while the bypass register is selected as the
serial path between TDI and TDO. While the CLAMP instruction is selected, the signals
driven from the component pins do not change.
HIGHZ Places the component in a state in which all of its system logic outputs are
placed in a high impedance state. In this state, an in-circuit test system may drive
signals onto the connections normally driven by a component output without incurring a
risk of damage to the component. This makes it possible to use a board where not all of
the components are compatible with the IEEE 1149.1 standard.
BYPASS The bypass register contains a single shift-register stage and is used to
provide a minimum-length serial path (one TCK clock period) between TDI and TDO to
bypass the device when no test operation is required.
The following table provides more information about the location and IEEE compliance
of the JTAG instruction codes used in the VSC8641.
JTAG Interface Instruction Codes
Boundary-Scan Register Cell Order
All inputs and outputs are observed in the boundary-scan register cells. All outputs are
additionally driven by the contents of boundary-scan register cells. Bidirectional pins
have all three related boundary-scan register cells: input, output, and control.
The complete boundary-scan cell order is available as a BSDL file format on the Vitesse
Web site at www.vitesse.com.
Description
Bit field
Binary value
Instruction
EXTEST
SAMPLE/PRELOAD
IDCODE
CLAMP
HIGHZ
BYPASS
RESERVED
Device Version
Number
31 through 28
0001
Code
0000
0001
0110
0010
0011
1111
0100, 0101,
0111, 1000-1110
Model Number
27 through 12
1000 0110 0100 0001 000 0111 0100
Selected Register
Boundary-scan
Boundary-scan
Device identification
Bypass register
Bypass register
Bypass register
Manufacturing
Identity
11 through 1
Register
Width
69
69
32
1
1
1
Functional Descriptions
VSC8641 Datasheet
IEEE 1149.1
Specification
Mandatory
Mandatory
Optional
Optional
Optional
Mandatory
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