VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 68

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VSC8641XKO

Manufacturer Part Number
VSC8641XKO
Description
IC PHY 10/100/1000 100-LQFP
Manufacturer
Vitesse Semiconductor Corp
Type
PHY Transceiverr
Datasheets

Specifications of VSC8641XKO

Number Of Drivers/receivers
1/1
Protocol
Gigabit Ethernet
Voltage - Supply
2.5V, 3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Case
TQFP
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
907-1031

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4.4
4.4.1
Table 49.
4.4.2
Table 50.
Revision 4.3
August 2009
CMODE Pin Bit 3 (MSB) Control Bit 2 Controls
Function
PHY Address[4:0]
MAC mode
Link speed
downshift
Speed and duplex
RGMII clock skew
4
3
2
1
0
MAC mode
PHY address[3]
PHY address[2]
PHY address[1]
PHY address[0]
CMODE
The information in this section consists of a detailed description of the methods to
configure the VSC8641 device using its CMODE pins. It includes descriptions of the
registers that work together with the CMODE pins to control the device function.
There are five configuration mode (CMODE) pins on the VSC8641 device. For more
information about the physical location of the CMODE pins, see
(VSC8641XKO, VSC8641XKO-03),”
bit, which means there are 20 possible settings for the device.
CMODE Pins and Related Functions
The following table lists the pin numbers and device functionality that is controlled by
each configuration bit.
CMODE Configuration Pins and Device Functions
Functions and Related CMODE Pins
The following table lists the pin and bit settings according to the device function and
CMODE pin used to configure it.
Device Functions and Associated CMODE Pins
CMODE
3 to 0
Pin
4
1
1
2
3 and 2
1 and 0
1 and 0
Bit
ActiPHY
Link speed downshift
LED3[1]
PHY address[4]
CLKOUT enable
3
2
Register, Bit
Register 20E,
Register 28E,
Register 23,
bits 8:5 and
Associated
Register 23,
Register 4,
Register 9,
bits 15:12
bit 8 and
bits 9:8
bit 12
bit 4
page 104. Each CMODE pin maps to a configuration
Result
Sets the PHY address.
0 = RGMII.
1 = GMII.
0 = Link only according to the auto-negotiation
resolution.
1 = Enable link speed downshift feature.
00 = 10/100/1000BASE-T FDX/HDX.
01 = 10/100/1000BASE-T FDX; 10/100BASE-T HDX.
10 = 1000BASE-T FDX only.
11 = 10/100BASE-T FDX/HDX.
00 = No skew on RX_CLK and TX_CLK.
01 = 1.4 ns skew on RX_CLK and TX_CLK.
10 = 1.7 ns skew on RX_CLK and TX_CLK.
11 = 2.0 ns skew on RX_CLK and TX_CLK.
RGMII clock skew[1]
Bit 1 Controls
LED3[0]
MAC calibration
setting[1]
Speed/duplex modes[1]
Advertise asymmetric
pause
“Pin Diagram
MAC calibration
setting[0]
RGMII clock skew[0]
Advertise symmetric
pause
Bit 0 (LSB) Controls
LED combine/separate
Speed/duplex modes[0]
VSC8641 Datasheet
Configuration
Page 68

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