WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 6

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
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Cortina Systems
Related Documents .......................................................................................................................10
PHY Signal Types .........................................................................................................................12
LQFP Numeric Pin List ..................................................................................................................13
PHY Signal Types .........................................................................................................................16
LXT972M: MII Data Interface Signal Descriptions.........................................................................17
LXT972M: MII Controller Interface Signal Descriptions.................................................................18
LXT972M: Network Interface Signal Descriptions .........................................................................18
LXT972M: Standard Bus and Interface Signal Descriptions .........................................................18
LXT972M: Configuration and LED Driver Signal Descriptions ......................................................18
LXT972M: Power, Ground, No-Connect Signal Descriptions ........................................................19
LXT972M: JTAG Test Signal Descriptions ....................................................................................19
LXT972M:Pin Types and Modes ...................................................................................................20
PHY Device Address Selections ...................................................................................................24
Hardware Configuration Settings...................................................................................................28
Carrier Sense, Loopback, and Collision Conditions ......................................................................33
4B/5B Coding ................................................................................................................................39
BSR Mode of Operation ................................................................................................................46
Device ID Register.........................................................................................................................46
Magnetics Requirements ...............................................................................................................47
I/O Pin Comparison of NIC and Switch RJ-45 Setups...................................................................47
Absolute Maximum Ratings ...........................................................................................................51
Recommended Operating Conditions ...........................................................................................51
Digital I/O Characteristics (Except for MII, XI/XO, and LED/CFG Pins) ........................................52
Digital I/O Characteristics
I/O Characteristics - REFCLK/XI and XO Pins ..............................................................................53
I/O Characteristics - LED/CFG Pins ..............................................................................................53
100BASE-TX PHY Characteristics ................................................................................................53
10BASE-T PHY Characteristics ....................................................................................................54
10BASE-T Link Integrity Timing Characteristics............................................................................54
Thermal Characteristics.................................................................................................................54
100BASE-TX Receive Timing Parameters - 4B Mode ..................................................................56
10BASE-T Receive Timing Parameters ........................................................................................57
10BASE-T Jabber and Unjabber Timing .......................................................................................59
PHY 10BASE-T SQE (Heartbeat) Timing......................................................................................59
Auto-Negotiation and Fast Link Pulse Timing Parameters ............................................................60
MDIO Timing .................................................................................................................................61
Power-Up Timing...........................................................................................................................62
RESET_L Pulse Width and Recovery Timing ...............................................................................63
Register Set for IEEE Base Registers ...........................................................................................64
Control Register - Address 0, Hex 0 ..............................................................................................65
MII Status Register #1 - Address 1, Hex 1 .................................................................................... 66
PHY Identification Register 1 - Address 2, Hex 2 ..........................................................................67
PHY Identification Register 2 - Address 3, Hex 3 ..........................................................................67
Auto-Negotiation Advertisement Register - Address 4, Hex 4.......................................................68
Auto-Negotiation Link Partner Base Page Ability Register - Address 5, Hex 5 .............................69
Auto-Negotiation Expansion - Address 6, Hex 6 ...........................................................................70
Auto-Negotiation Next Page Transmit Register - Address 7, Hex 7 ..............................................70
Auto-Negotiation Link Partner Next Page Receive Register - Address 8, Hex 8 ..........................71
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
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- MII Pins ............................................................................................52
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