WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 74

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
Table 51
Cortina Systems
Status Register #2 - Address 17, Hex 11 (Sheet 2 of 2)
®
1. RO = Read Only. R/W = Read/Write
17.7
17.6
17.5
17.4
17:3
17:2
17:1
17.0
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Bit
Auto-Negotiation
Complete
Reserved
Polarity
Pause
Error
Reserved
Reserved
Reserved
Name
0 = Auto-negotiation process not completed.
1 = Auto-negotiation process completed.
This bit is valid only when auto negotiate is
enabled. The value is equivalent to the value of
register bit 1.5.
Always 0.
0 = Polarity is not reversed.
1 = Polarity is reversed.
Note:
0 = The LXT972M PHY is not Pause capable.
1 = The LXT972M PHY is Pause capable.
0 = No error occurred
1 = Error occurred (Remote Fault, jabber, parallel
Note:
Always 0.
Always 0.
Always 0.
detect fault)
Polarity is not a valid status in 100 Mbps
mode.
The register bit is cleared when the
registers that generate the error condition
are read.
Description
Product-Specific Registers
9.0 Register Definitions -
Type
RO
RO
RO
RO
RO
RO
RO
R
1
Default
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0
0
0
0
0
0
0
0