Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 134

• Manufacturer Part Number: Z16M1720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z16M1720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Bit 0
LOAD command. 1 indicates yes, 0 indicates no.
Bit 1
that is defined as active by bit 3 of WR5. 1 indicates an active Ready line. 0
indicates an inactive Ready line.
Bit 2
Bit 3
that an interrupt is pending (the DMA has its INT line active if the interrupt
has not been acknowledged). A 1 indicates no interrupt pending.
Bit 4
REINITIALIZE STATUS BYTE command. A1 indicates no match was
found. See Table 11 to determine where the match occurred.
Bit 5
RESET, LOAD, CONTINUE, or REINITIALIZE STATUS BYTE
command. A 1 indicates no end-of-block was reached. See Table 12 to
determine the contents of counters when the DMA stops.
Bit 6
Bit 7
Indicates whether the DMA has requested the bus after the fast
Indicates whether the DMA’s RDY pin currently has a signal input
Undefined.
Indicates the state of the Interrupt Pending (IP) latch. A 0 indicates
A 0 indicates that a match has been found after the last RESET or
A 0 indicates that an end-of-block was reached after the last
Undefined.
Undefined.
Direct Memory Access