Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 38

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Z16M1720ASG1868

Manufacturer Part Number
Z16M1720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet

Specifications of Z16M1720ASG1868

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16M1720ASG1868
Manufacturer:
Zilog
Quantity:
10 000
UM008101-0601
Bit
Number
4
3
2
1
0
*TIMER mode only
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Field
CLK/TRG Edge
Section
Time Trigger*
Time Constant
Reset
Control or Vector
Bit 7 = 1. Each channel is enabled to generate an interrupt request sequence
when the down-counter reaches a zero-count condition. To set the interrupt
bit to 1 in any of the four Channel Control registers an interrupt vector is
written to the CTC before operation begins. Channel interrupts may be
programmed in either Counter or Timer mode. If an updated channel
control word is written to a channel in operation, with bit 7 set, the interrupt
enable selection is not retroactive to a preceding zero-count condition.
Bit 7 = 0. Channel interrupts disabled.
Bit 6 = 1. Counter mode selected. The down-counter is decremented by
each triggering edge of the External clock (CLK/TRG) input. The prescaler
is not used.
Bit 6 = 0. Timer mode selected. The prescaler is clocked by the System
clock Φ, and the output of the prescaler in turn clocks the down-counter.
The output of the down-counter (the channel’s ZC/TO output) is a uniform
pulse train of period given by the product as shown below
8
-
R/W Value Description
R/W
R/W
R/W
R/W
R/W
$ 
0
1
0
1
0
1
0
1
0
1
Rising Edge
Falling Edge
CLK/TRG Pulse Starts Timer
Automatic trigger when time constant is loaded
Time Constant Follows
No Time Constant Follows
Software Reset
Continue Operation
Control
Vector
Counter/Timer Channels

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