Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 138
Z16M1720ASG1868
Manufacturer Part Number
Z16M1720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z16M1720ASG1868
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Table 15. Control Byte Order (Continued)
Port Designation
Either Port A or Port B can be selected as the source or destination, (illus-
trated in Figure 19) because both ports feature the same degree of program-
mability. When the destination port is also a fixed-address port, see the
section “Fixed-Address Destination Ports.” Port characteristics are spec-
ified in the following control byte groups:
In a transfer, if the direction of transfer (bit 2 of WR0) changes, the WR0
control byte must be preceded by a different control byte, thereby insuring
that the DMA is disabled.
Initialization/Reinitialization Sequence
REINITIALIZE STATUS BYTE
Command
READ MASK FOLLOWS Command
Read Mask Control Byte
INITIATE READ SEQUENCE
Command
FORCE READY Command
ENABLE INTERRUPTS Command
ENABLE DMA Command
Total
Port A
WR0
WR1
WR6
Port B
WR0
WR2
WR4
WR6
Maximum Number of Z80 CPU
Bytes
1
1
1
1
1
1
1
35
Direct Memory Access
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