Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 150

• Manufacturer Part Number: Z16M1720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z16M1720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Figure 49.
Use of WAIT Input
When the DMA is bus master, the CE/WAIT pin functions as an input from
memory or I/O logic that may extend read or write cycles by requesting
Waits states. An active BUSACK output from the CPU signals that the
A DMA responds to
B PROM determines
C DMA responds to
I/O addresses 00H
through 77H
DMA response
I/O addresses E0H
through E3H
Chip Enable Decoding with Z80 CPU
CPU
IORQ
CPU
CPU
IORQ
Z80
IORQ
M1
M1
M1
M1 IORQ
A5
M1 IORQ
M1 IORQ
A0 A7
Address Bus
A0
DMA
A7
DMA
DMA
A0
A7
PROM
256X4
A2
E
E
E
CE
CE
S0 S1 S2
0
A3 A4
04
03
02
01
1 2 3 4 5 6 7
A7
74LS138
CE
Direct Memory Access
.
.
.
.
CE1
CE7
CE3
CE2
CE1