Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 246
Z16M1720ASG1868
Manufacturer Part Number
Z16M1720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z16M1720ASG1868
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
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226
UM008101-0601
RxDA
RxCA
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Delay
1-Bit
Receive
Clock
Logic
Functional Description
ASYNC Data
Figure 109. Transmit and Receive Data Path
The functional capabilities of the Z80 SIO are described in two ways: as a
data communications device, and as a Z80 family peripheral.
As a data communications device, The S80 SIO transmits and receives
serial data, and meets the requirements of various data communications
protocols. As a Z80 family peripheral, it interacts with the Z80 CPU and
other Z80 peripheral, circuits, and shares their data, address and control
and Zero
Register
SYNC
Delete
Hunt Mode (BISYNC)
SDLC-CRC
3 Bits
CRC Delay
Register
Checker
Internal Data Bus
(8 Bits)
CRC
Receive
Receive
(8 Bits)
FIFO
Error
S.R.
CRC Result
SYNC-
CRC
Receive
FIFO
Error
Receive
Logic
Error
I/O Data Buffer
CPU I/O
Register
SYNC
WR7
SDLC-CRC
Generator
20-Bit Transmit Shift Register
(5 Bits)
Insert
Zero
CRC
ASYNC Data
SYNC Data
SDLC Data
SYNC-CRC
Register
SYNC
WR6
Serial Input/Output
Transmit
Data
Clock Logic
Multiplexer
Transmit
Transmit
Delay
2-Bit
and
Start Bit
TxDA
TxCA
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