PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 56

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.4.43 GPIO DATA AND CONTROL REGISTER – OFFSET 78h
7.4.44 RESERVED REGISTER – OFFSET 7Ch
7.4.45 PCI-X CAPABILITY ID REGISTER – OFFSET 80h
7.4.46 NEXT CAPABILITY POINTER REGISTER – OFFSET 80h
7.4.47 PCI-X SECONDARY STATUS REGISTER – OFFSET 80h
PERICOM SEMICONDUCTOR - Confidential
Bit
23
31:24
Bit
11:0
15:12
19:16
23:20
27:24
31:28
Bit
7:0
Bit
15:8
Bit
16
17
18
Function
INS for Insertion
Reserved
Function
Reserved
GPIO Output Write-
1-to-Clear
GPIO Output Write-
1-to-Set
GPIO Output Enable
Write-1-to-Clear
GPIO Output Enable
Write-1-to-Set
GPIO Input Data
Register
Function
PCI-X Capability ID
Function
Next Capability
Pointer
Function
64-bit Device on
Secondary Bus
Interface
133MHz Capable
Split Completion
Discarded
Type
Type
Type
Type
Type
RWC
RWC
RO /
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
Page 56 of 165
Description
INS bit indicates ENUM_L status of insertion. When INS is 1, ENUM_L is
asserted
Reset to 1
Reset to 00h
Description
Reset to 000h
Reset to 0h
Reset to 0h
Reset to 0h
Reset to 0h
Reset to 0h
Description
PCI-X Capability ID
Reset to 07h
Description
Point to power management
Reset to 90h
Description
64-bit supported when DEV64 is set to high
Reset to 1in forward bridge mode and DEV64 is set to high or reset to 0 in
reverse bridge mode
When this bit is 1, PI7C9X130 is 133MHz capable on its secondary bus
interface
Reset to 1 in forward bridge mode or 0 in reverse bridge mode
This bit is a read-only and set to 0 in reverse bridge mode or is read-write in
forward bridge mode
When this is set to 1, a split completion has been discarded by PI7C9X130 at
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130