MRF89XAT-I/MQ Microchip Technology, MRF89XAT-I/MQ Datasheet - Page 22

• Manufacturer Part Number: MRF89XAT-I/MQ
• Description: RF ISM BAND TXRX 32 QFN
• Manufacturer: Microchip Technology
• Series: -r

Specifications of MRF89XAT-I/MQ

• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200 kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Memory Size: *
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Rf Ic Case Style: QFN
• No. Of Pins: 32
• Svhc: No SVHC (20-Jun-2011)
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MRF89XAT-I/MQTR

FIGURE 2-9:
FIGURE 2-10:
2.11
The
microcontroller through a 4-wire SPI port as a slave
device. An SPI-compatible serial interface allows the
user to select, command and monitor the status of the
MRF89XA through the host microcontroller. All
registers are addressed through specific addresses to
control, configure and read status bytes.
FIGURE 2-11:
DS70622B-page 22
MRF89XA
in FSK mode
equal to f
IF2 < 0
in FSK mode
MRF89XA
IF2 = 0
Serial Peripheral Interface (SPI)
0
Configuration
Registers
o
Registers
down-conversion
Config.
FIFO
0
down-conversion
Second
Second
communicates
Approx. 100 MHz
FSK RECEIVER SETTING
OOK RECEIVER SETTING
SPI OVERVIEW AND HOST MICROCONTROLLER CONNECTIONS
MRF89XA
LO2
IF1
RX
100 MHz
Approx.
IF1
LO2 RX
with
CONFIG
(Slave)
(Slave)
DATA
SPI
SPI
the
host
Preliminary
down-conversion
CSCON
SDI
SDO
SCK
CSDAT
down-conversion
First
The SPI in the MRF89XA consists of the following two
sub-blocks, as illustrated in Figure 2-11:
• SPI CONFIG: This sub-block is used in all data
• SPI DATA: This sub-block is used in Buffered and
First
operation modes to read and write the configuration
registers which control all the parameters of the chip
(operating mode, frequency and bit rate).
Packet mode to write and read data bytes to and
from the FIFO. (FIFO Interrupts can be used to
manage the FIFO content).
Frequency
Image
Frequency
Image
I/O
SDI
SDO
SCK
I/O
© 2010 Microchip Technology Inc.
LO1 RX
LO1 RX
PIC
®
Microcontroller
(Master)
Channel
Channel
Frequency
Frequency