MRF89XAT-I/MQ Microchip Technology, MRF89XAT-I/MQ Datasheet - Page 31
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
MRF89XAT-I/MQ
Manufacturer Part Number
MRF89XAT-I/MQ
Description
RF ISM BAND TXRX 32 QFN
Manufacturer
Microchip Technology
Series
-r
Datasheet
1.MRF89XA-IMQ.pdf
(142 pages)
Specifications of MRF89XAT-I/MQ
Frequency
863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
Data Rate - Maximum
200 kbps
Modulation Or Protocol
FSK, OOK
Applications
ISM
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Memory Size
*
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Rf Ic Case Style
QFN
No. Of Pins
32
Svhc
No SVHC (20-Jun-2011)
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MRF89XAT-I/MQTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MRF89XAT-I/MQ
Manufacturer:
MICROCHIP
Quantity:
12 000
TABLE 2-6:
© 2010 Microchip Technology Inc.
Receiver Configuration Registers: Size – 6 Bytes, Start Address – 0x14
Sync Word Configuration Registers: Size – 4 Bytes, Start Address – 0x16
Transmitter Configuration Registers: Size – 1 Byte, Start Address – 0x1A
Oscillator Configuration Registers: Size – 1 Byte, Start Address – 0x1B
Packet Handling Configuration Registers: Size – 4 Bytes, Start Address – 0x1C
Register
Address
Register
Address
Register
Address
Register
Address
Register
Address
0x1C
0x1D
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1E
0x1F
RSTSREG
OOKCREG
SYNCV31REG Sync Value 1
SYNCV23REG Sync Value 2
SYNCV15REG Sync Value 3
SYNCV07REG Sync Value 4
TXCONREG
CLKOREG
PLOADREG
NADDSREG
PKTCREG
FCRCREG
Register
Register
Register
Register
Register
Name
Name
Name
Name
Name
CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION (CONTINUED)
RSSI Status Read Register
OOK Configuration Register
Register
Register
Register
Transmit Configuration Register
Clock Output Control Register
Payload Configuration Register
Node Address Set Register
Packet Configuration Register
FIFO CRC Configuration Register
Register Description
Register Description
Register Description
Register Description
Register Description
st
nd
rd
th
Byte Configuration Register Configuring first byte of the 32-bit
Byte Configuration
Byte Configuration
Byte Configuration
Preliminary
Sync word
Node’s local address for filtering of received
packets
whitening, CRC on/off, address filtering of
received packets, CRC status
RSSI output
RSSI threshold size in OOK demodulator,
RSSI threshold period in OOK demodulator,
cut-off frequency of the OOK threshold in
demodulator
Configuring second byte of the 32-bit
Sync word
Configuring third byte of the 32-bit
Sync word
Configuring fourth byte of the 32-bit
Sync word
Transmit interpolation cut-off frequency,
power output
Clock-out control, frequency
Enable Manchester encoding/decoding,
payload length
Packet format, size of the preamble,
FIFO auto-clear (if CRC failed), FIFO
access
Related Control Functions
Related Control Functions
Related Control Functions
Related Control Functions
Related Control Functions
MRF89XA
DS70622B-page 31