MRF89XAT-I/MQ Microchip Technology, MRF89XAT-I/MQ Datasheet - Page 43

no-image

MRF89XAT-I/MQ

Manufacturer Part Number
MRF89XAT-I/MQ
Description
RF ISM BAND TXRX 32 QFN
Manufacturer
Microchip Technology
Series
-r
Datasheet

Specifications of MRF89XAT-I/MQ

Frequency
863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
Data Rate - Maximum
200 kbps
Modulation Or Protocol
FSK, OOK
Applications
ISM
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Memory Size
*
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Rf Ic Case Style
QFN
No. Of Pins
32
Svhc
No SVHC (20-Jun-2011)
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MRF89XAT-I/MQTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF89XAT-I/MQ
Manufacturer:
MICROCHIP
Quantity:
12 000
REGISTER 2-15:
© 2010 Microchip Technology Inc.
bit 1
bit 0
Note 1: Setting this bit to ‘0’ disables the RSSI IRQ source. It can be left enabled at any time, and the user can
choose to map this interrupt to IRQ0/IRQ1 or not.
LSTSPLL: Lock Status of PLL bit
1 = PLL locked (lock detected)
0 = PLL not locked
Writing a ‘1’ for this bit clears LSTSPLL.
LENPLL: Lock Enable of PLL bit
1 = PLL lock detect enabled (default)
0 = PLL lock detect disabled
The PLL lock detect flag is mapped to the PLOCK pin (pin 23), and pin 23 is a High-Z pin
FTPRIREG: FIFO TRANSMIT PLL AND RSSI INTERRUPT REQUEST
CONFIGURATION REGISTER (ADDRESS:0x0E) (POR:0x01) (CONTINUED)
Preliminary
MRF89XA
DS70622B-page 43

Related parts for MRF89XAT-I/MQ