CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 8

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

1.0
Cypress Semiconductor Corporation’s (Cypress’s) CYNSE70256 network search engine (NSE) incorporates patent-pending
Associative Processing Technology™ (APT) and is designed to be a high-performance, pipelined, synchronous, 256K-entry NSE.
The CYNSE70256 database entry size can be 72 bits, 144 bits, or 288 bits. In the 72-bit entry mode, the size of the database is
128K entries. In the 144-bit mode, the size of the database is 64K entries, and in the 288-bit mode, the size of the database is
32K entries. The CYNSE70256 is configurable to support multiple databases with different entry sizes. The 36-bit entry table can
be implemented using the global mask registers (GMRs), building database size of 256K entries with a single device.
The NSE can sustain 83 million transactions per second when the database is programmed or configured as 72 or 144 bits. When
the database is programmed to have an entry size of 36 or 288 bits, the NSE will perform at 41.5 million transactions per second.
Cypress’s CYNSE70256 can be used to accelerate network protocols such as Longest-Prefix Match (CIDR), ARP, MPLS, and
other layer 2, 3, and 4 protocols.
This high-speed, high-capacity NSE can be deployed in a variety of networking and communications applications. The perfor-
mance and features of the CYNSE70256 make it attractive in applications such as Enterprise LAN switches and routers, and
broadband switching and/or routing equipment that supports multiple data rates at OC–48 and beyond. The NSE is designed to
be scalable in order to support network database sizes of up to 3840K entries specifically for environments that require large
network policy databases. Figure 2-1 on page 9 shows the block diagram for the CYNSE70256 device.
2.0
Document #: 38-02035 Rev. *E
• 256K 36-bit entries in a single device
• 128K entries in 72-bit mode, 64K entries in 144-bit mode, 32K entries in 288-bit mode
• 83 million transactions per second in 72- and 144-bit configurations (CFGs)
• 41.5 million transactions in 36- and 288-bit configurations
• Searches any subfield in a single cycle
• Synchronous pipelined operation
• Up to fifteen NSEs can be cascaded
• When cascaded, database entries can range to 3840K 36-bit entries
• Multiple width tables in a single database bank
• Glueless interface to industry-standard SRAMs and/or SSRAMs
• Simple hardware instruction interface
• IEEE 1149.1 test access port
• 1.5V core voltage supply
• 2.5V/3.3V I/O voltage supply
• 388-pin BGA package.
Overview
Features
CYNSE70256
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