CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 85

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

11.3
Bit[0] of each of the 72-bit entries is designated as a special bit (1 = occupied, 0 = empty). For each Learn or PIO Write to the
data array, each device asserts FULO[1] or FULO[0] depending on whether or not it has any empty locations within it (see
Figure 11-3). Each device combines the FULO signals from the devices above it with its own full status to generate a FULL signal
that gives the full status of the table up to the device asserting the FULL signal. Figure 11-3 shows the hardware connection
diagram for generating the FULL signal that goes back to the ASIC. In a depth-cascaded block of up to four devices, the FULL
signal from the last device should be fed back to the ASIC controller to indicate the fullness of the table. The FULL signal of the
other devices should be left open.
Note:
Document #: 38-02035 Rev. *E
31. The Learn instruction is supported for only up to four devices, whereas FULL cascading is allowed only for one block in tables containing more than four devices.
In tables for which a Learn instruction is not going to be used, the bit[0] of each 72-bit entry should always be set to 1.
Depth Cascading for a FULL Signal
SSF, SSV
DQ[71:0]
CMD[10:0], CMDV
[31]
Figure 11-2. Depth Cascading four Blocks
BHO[2]
BHO[2]
BHI[2]
BHO[2]
BHO[2]
Block of 8 CYNSE70256s Block 0
Block of 8 CYNSE70256s Block 2
Block of 7 CYNSE70256s Block 3
Block of 8 CYNSE70256s Block 1
BHI[2]
BHI[2]
BHI[2]
(devices 12–14)
(devices 8–11)
(devices 0–3)
(devices 4–7)
BHO[1]
BHO[1]
BHI[1]
BHO[1]
BHO[1]
BHI[1]
BHI[1]
BHI[1]
BHO[0]
BHO[0]
BHO[0]
BHO[0]
BHI[0] GND
BHI[0]
BHI[0]
BHI[0] GND
GND
SRAM
CYNSE70256
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