DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 21

DSPB56364FU100

Manufacturer Part Number
DSPB56364FU100
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSPB56364FU100

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
9KB
Program Memory Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.14V
Operating Supply Voltage (max)
3.46V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

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3.7
The DSP56364 system clock is an externally supplied square wave voltage source connected to EXTAL
(See
Freescale Semiconductor
1
2
Internal clock low period
Internal clock cycle time with PLL enabled
Internal clock cycle time with PLL disabled
Instruction cycle time
• With PLL disabled
• With PLL enabled and MF ≤ 4
• With PLL enabled and MF > 4
DF = Division Factor
Ef = External frequency
ET
MF = Multiplication Factor
PDF = Predivision Factor
T
See the PLL and Clock Generation section in the DSP56300 Family Manual for a detailed discussion of the PLL.
C
C
Figure
= internal clock cycle
= External clock cycle
External Clock Operation
Note: The midpoint is 0.5 (V
3-1).
Characteristics
EXTAL
V
ILC
ETH
2
IHC
Table 3-4 Internal Clocks (continued)
Figure 3-1 External Clock Timing
+ V
DSP56364 Technical Data, Rev. 4.1
4
ILC
ETL
Symbol
).
I
T
T
CYC
T
C
C
L
3
ETC
PDF × DF/MF
PDF × DF/MF
0.49 × ET
0.47 × ET
Min
C
C
×
×
Midpoint
Expression
ET
2 × ET
C
DF/MF
ET
Typ
× PDF ×
T
C
C
C
V
1, 2
IHC
External Clock Operation
PDF × DF/MF
PDF × DF/MF
0.51 × ET
0.53 × ET
Max
C
C
×
×
3-5

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