PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 218
PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Table 37
Register
2nd entry of
IQCFG in
shared memory
2nd entry of
IQSCC1TX in
shared memory
3rd entry of
IQSCC1TX in
shared memory
1st entry of
IQSCC1RX in
shared memory
2nd entry of
IQSCC1RX in
shared memory
See figure 76 for data structure in shared memory after data transmission.
Data Sheet
Register Initialization for HDLC Transparent Mode 0, Test Loop
Access
<= (write)
=> (read)
=>
=>
=>
=>
=>
Value
A000 0001
5002 0000
5204 0000
1200 0040
1006 0000
218
Meaning
Indication Bits:
- CFG interrupt queue ID
- Action Request Acknowledge indicated
Indication Bits:
- DMA(SCC) TX interrupt queue ID
- Caused by DMA
- FI interrupt indicated
Indication Bits:
- SCC1 TX interrupt queue ID
- Caused by SCC
- ALLS interrupt indicated
Indication Bits:
- SCC1 RX interrupt queue ID
- Caused by SCC
- RFS interrupt indicated
Indication Bits:
- SCC1 RX interrupt queue ID
- Caused by DMAC
- HI, FI interrupt indicated
Reset and Initialization Procedure
PEB 20534
PEF 20534
2000-05-30
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