PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 91
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PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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After having transferred the first frame to the SCC, the remaining TFIFO fill level is
between the two watermarks. Now DMAC operation does NOT start if the refill
watermark is not suffused and transfer to the SCC does NOT start due to neither a frame
end indication is detected nor the forward watermark is exceeded.
This is a deadlock condition!
Note: The DMAC evaluates the 2 conditions for transfer to SCC with the beginning of
Note: The small SCC specific FIFOs always request for data if space is available even
Data Sheet
each new frame.
if the SCC is in power down condition. If the forward threshold condition is met,
data is transferred into the SCC FIFO immediately (6 DWORDs because transfer
to the 2 DWORD shadow FIFO does not happen in power-down).
91
DMA Controller and Central FIFOs
PEB 20534
PEF 20534
2000-05-30
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