PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 290
PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Data Sheet
TCLKO
RTS
Transmit Clock Output
This bit is only valid in high speed operation mode, i.e. clock mode 4 and
CCR0.HS = ’1’.
In high speed mode the internal transmit clock is supplied to pin RTS as
an output.
TCLKO=’0’
TCLKO=’1’
Request To Send pin control
The request to send pin RTS can be controlled by the DSCC4 as an
output autonomously or via setting/clearing bit ’RTS’.
This bit is not valid in high speed operation mode.
RTS=’0’
RTS=’1’
Note: For RTS pin control a transmit clock is necessary.
Pin RTS is an unused input signal in high speed operation
mode.
It should be connected to a known level via a pull-up/down
resistor.
The internal transmit clock is supplied as an output signal
to pin RTS.
RTS (output) pin is controlled by the DSCC4
autonomously.
• In HDLC modes RTS is activated during transmission.
• In ASYNC and BISYNC mode, the function depends on
• In bus configuration mode the functionality depends on
• In HDLC modes RTS (output) is activated (low) until
• In ASYNC and BISYNC mode, the function depends on
bit ’FRTS’ in register CCR1.
bit field ’SOC’ setting.
this bit is cleared by software again.
bit ’FRTS’ in register CCR1.
290
Detailed Register Description
PEB 20534
PEF 20534
(hdlc mode)
(all modes)
2000-05-30
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