PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 38

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PEB20534H-10V2.1

Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
Datasheets

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Part Number:
PEB20534H-10V2.1
Manufacturer:
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Table 2
Pin No.
84
150
162
Table 3
Pin No.
71
73
72
74
3
Data Sheet
Symbol
TEST
Reserved
1
Reserved
2
Symbol
TCK
TMS
TDI
TDO
TRST
Dedicated Signals (cont’d)
JTAG Test Port for Boundary Scan according to IEEE 1149.1
Input (I)
Output (O)
I
-
-
Input (I)
Output (O)
I
I
I
O
I
Function
Test Input
When connected to V
a vendor specific test mode.
It is recommended to connect this pin to V
Reserved Pin 1
A Pull-Up resistor to V
Reserved Pin 2
A Pull-Up resistor to V
Function
JTAG Test Clock
Connection V
boundaryscan unit is not used.
JTAG Test Mode Select
Note: An internal pull-up transistor is provided.
JTAG Test Data Input
Note: An internal pull-up transistor is provided.
JTAG Test Data Output
JTAG Reset Pin
For normal device operation this pin should be
connected to V
deactivation of the boundary scan unit.
For boundary scan mode TRST should be
connected to high level.
Note: An internal pull-up transistor forces
38
Pin TMS can be left unconnected if
boundary scan operation is not used.
Pin TDI can be left unconnected if
boundary scan operation is not used.
boundary scan operation mode if this
pin remains unconnected.
DD3
SS
is recommended if
or logical ’0’ to force
DD3
DD3
DD3
the DSCC4 works in
is required.
is required.
Pin Descriptions
PEB 20534
PEF 20534
2000-05-30
SS
.

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