PEB 20571 F V3.1 Infineon Technologies, PEB 20571 F V3.1 Datasheet - Page 146

• Manufacturer Part Number: PEB 20571 F V3.1
• Description: IC LINE CARD CTRLR DSP TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEB 20571 F V3.1

• Function: PBX Controller with DSP
• Interface: ISDN
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 272.6mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Layer-1 Control, Signaling Control, Signal Processing, Voice Channel Handling
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Number Of Circuits: -
• Other names: PEB20571FV3.1X; PEB20571FV31XP; SP000007539

The user program should perform statistics in the following way:
• The STATC is reset upon detection of FSC rising edge.
• The DSP finishes its activities and reads the value of STATC and STATI. The DSP
• If the new value is larger, it is written to STATI.
The system programmer can get the counter value via P Mailbox and thus can change
the DSP program.
4.8.5
The internal data bus (GEXDBP) and program data bus (GIP) are tri-state buses. Since
these buses must never float, the DCU keeps track of the bus activities. If during a
dedicated cycle no driver is on the bus, the DCU puts a default value on the bus.
4.8.6
The µP boot is the process which loads the external µP program RAM via the µP Mailbox
into the on-chip DSP program RAM. The boot is controlled by a boot routine residing in
the internal DSP program ROM. This routine is started upon DELIC reset according to
the BOOT strap pin status.
The second boot option is the emulation boot, which loads the monitor (BI routine) to the
program RAM. This routine enables the PC emulator to control the DSP.
At system start-up the program code for the DSP is transferred into the internal RAM
from the external µP. The contents for the program and data boot is delivered in a so
called HEX file.
The code format of the HEX file is the following:
Code,:,16 bit address, 16 bit opcode
C:0000 4180
C:0001 0018
C:0004 4180
C:0005 00BA
C:0006 4180
C:0007 00BD
C:000E 4180
C:000F 00BE ...
The program boot starts with the "Start Loading Program RAM" command which is
coming from the DELIC boot routine.
OCMD = 0x1F
This command must be polled from the µP because the interrupt is still not activated.
The µP confirms this with the "Start Boot" command.
MCMD = 0x55
Data Sheet
compares STATC to the previous maximum value saved in STATI.
Data Bus and Program Bus Arbitration
Boot Support
129
Functional Description
PEB 20570
PEB 20571
2003-07-31