PEB 20571 F V3.1 Infineon Technologies, PEB 20571 F V3.1 Datasheet - Page 153

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PEB 20571 F V3.1

Manufacturer Part Number
PEB 20571 F V3.1
Description
IC LINE CARD CTRLR DSP TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB 20571 F V3.1

Function
PBX Controller with DSP
Interface
ISDN
Voltage - Supply
3.13 V ~ 3.47 V
Current - Supply
272.6mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Layer-1 Control, Signaling Control, Signal Processing, Voice Channel Handling
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Number Of Circuits
-
Other names
PEB20571FV3.1X
PEB20571FV31XP
SP000007539
Figure 54
1. The DMA transmit mailbox is empty
2. DELIC requests DMA service via DREQT
3. The DMA controller addresses memory with ADDR and the DELIC with DACK
4. With read signal (RD), memory data reach the data bus
5. In parallel, when the data are stable on the bus, the DMA controller writes it directly
Note: In Intel/Infineon Mode, RD is used as write signal for the transmit mailbox.
4.10.1
In transactions between DMA controller and DELIC, the DELIC indicates that it is ready
to transmit/ receive data by setting DREQT / DREQR high. The DMA controller answers
by driving DACK low. DACK acts like a CS and remains low during the entire transaction.
By driving DACK high, the DMA controller can stop the transaction on any stage, even if
the data transfer has not been finished yet.
DELIC Programming
1. Set the DMA transfer mode in MCFG register by the P to Memory-to-Memory or Fly-
Data Sheet
into the transmit mailbox.
by mode.
DMA Handshake
Single cycle DMA transfer mode for Transmit Data
1-Cycle-Mode-T
Controller
DMA
DREQT
ADDR
136
DACK
+ RD
RD
Memory
Mailbox
DELIC
DMA
Data
Data Bus
Functional Description
PEB 20570
PEB 20571
2003-07-31

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