PEF 24470 H V1.3 Infineon Technologies, PEF 24470 H V1.3 Datasheet - Page 16

• Manufacturer Part Number: PEF 24470 H V1.3
• Description: IC MTSI-XL SWITCHING MQFP100
• Manufacturer: Infineon Technologies
• Series: SWITIr

Specifications of PEF 24470 H V1.3

• Function: Switching IC
• Interface: PCM, PLL
• Number Of Circuits: 1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 200mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-SQFP
• Includes: Clock Shift, Data Rate Adaption, Multipoint Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF24470HV1.3X; SP000007617

PEF 20450 / 20470 / 24470
Overview
PRELIMINARY
Broadcast
With this feature it is possible to distribute one incoming time-slot to different output time-
slots.
Multipoint
Multipoint connections can be seen as the opposite of broadcast connections. Here it is
possible to generate one output time-slot consisting of several input time-slots. The
specified input time-slots are logically AND or OR connected (selectable) and have a
constant delay of 2 frames.
Read Access
The programmer has access to any input time-slot. After issuing an appropriate
command the arrival of the time-slot will be reported by interrupt. The value can be read
from a dedicated register. For every read request the command has to be issued again.
Message Mode (Write Access)
This feature allows a constant value to be sent to any given output time-slot.
Framing Group
It is possible to specify up to 8 different framing signals of 8 kHz. The position of the rising
edge and the pulse width can be programmed for each signal. The reference frame is
determined by the PFS signal. The pulse parameters are programmed in half step
resolution according to a 16.384 MHz clock.
General Purpose Clocks
All 8 GPCLK lines can be configured as individual clock outputs with 8 kHz, 2.048 MHz,
4.096 MHz, 8.192 MHz, 16.384 MHz and for test purposes with the internal frequency or
the input frequency of the analog PLL (APLL).
GPIO Port
Each line of the general purpose input/output port can be configured to be either input or
output. According to an input an edge causes an interrupt. The outputs can be influenced
by write access via the microprocessor interface. Thus the user has the possibility to
observe and influence additional signals for his application.
Microprocessor Interface
All devices provide a standard 8-bit microprocessor interface operating in either Intel or
Motorola mode. Optionally it is possible to configure the GPIO port as additional data
lines to provide a 16-bit microprocessor interface. The use of the 16-bit µP interface
Preliminary Data Sheet
7
2001-11-20