PEF 24470 H V1.3 Infineon Technologies, PEF 24470 H V1.3 Datasheet - Page 29

• Manufacturer Part Number: PEF 24470 H V1.3
• Description: IC MTSI-XL SWITCHING MQFP100
• Manufacturer: Infineon Technologies
• Series: SWITIr

Specifications of PEF 24470 H V1.3

• Function: Switching IC
• Interface: PCM, PLL
• Number Of Circuits: 1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 200mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-SQFP
• Includes: Clock Shift, Data Rate Adaption, Multipoint Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF24470HV1.3X; SP000007617

PRELIMINARY
The internal S/P-converter is bypassed. The 8 bit data stream per time-slot is distributed
on 8 data lines, one bit for every line. The least significant bit is assigned to line 0 and
the most significant bit is assigned to line 7. To program a connection line 0 must be used
for this special parallel data port. The bit shift value must only be programmed for port 0
and this value will be assigned to the other 7 ports automatically. The initialize sequence
is described in
The switching data handling is the same as the data handling for constant delay or
minimum delay mode. A timing diagram is provided in the timing diagram chapter (
“PCM Parallel Mode Timing” on page
3.3.3
The normal procedure to establish a connection is explained in
program a new connection for a specific time-slot and data line is to release the
connection and to program the new connection. The SWITI switching concept provides
an internal error handling to detect errors in the switching chain caused by a
programming error. A programming error can occur because of noises on the data lines,
software errors, etc.
A programming error is defined as follows:
– if a non existing connection (minimum, constant delay, or message) will be released.
– or if an existing minimum delay connection will be established.
If a programming error or a connection memory overflow is detected the interrupt bit
CON in the
tried to establish or to release is not valid. The operation of the switching device is not
affected and will be continued without any restrictions.
For debug purposes the SWITI has the capability to write out the content of the complete
connection memory and data memory via the microprocessor interface. This procedure
is described in
It is recommended to track all established and connections with the specific customer
application software. For debug purpose it is useful to compare the contents of the
switching memory with the virtual connections in the application software.
3.3.4
With the special command "memory dump enable" in the connection command register
(CCMD) it is possible to read the complete memory in a defined sequence from the
register with a 8-bit µP access. This feature can be used only for analyze purposes.
The command disables the complete switching function as far as all data lines are set to
high impedance. If the command is set and after the specific recovery time (200 ns) the
connection chain and data memory can be read sequentially by a µP access to the
register. The internal controller writes the next 8-bit memory data in the
Preliminary Data Sheet
Switching Block Error Handling
Analyze Connection and Data Memory
IESTA2
Chapter
Chapter
register will be set. In this case the last connection which has been
6.
3.3.4.
104.).
20
PEF 20450 / 20470 / 24470
Architectural Description
Chapter
CON
6. The way to
2001-11-20
register if
CON
CON