SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 91

IC UART W/FIFO 48-TSSOP

SC28L201A1DGG,118

Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L201A1DGG,118

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
Philips Semiconductors
11. Static characteristics
Table 80:
V
[1]
[2]
[3]
[4]
[5]
9397 750 13138
Product data sheet
Symbol
V
V
V
V
I
I
I
I
I
I
I
I
I
I(PD)(X1/SCLK)
IL(X1/SCLK)
IH(X1/SCLK)
LI
OZH
OZL
ODL
ODH
DD
DD
IL
IH
OL
OH
= 5 V
Typical values are at +25 C, typical supply voltages, and typical processing parameters.
All voltage measurements are referenced to ground. For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of 5 ns
maximum. For X1/SCLK this swing is between 0.4 V and 4.4 V. All time measurements are referenced at input voltages of 0.8 V and
2.0 V, and output voltages of 0.8 V and 2.0 V, as appropriate.
Test conditions for outputs: C
I/O port and IACKN pins have active pull-up transistors that will source a typical 2 A from V
0.0 A.
All outputs are disconnected. Inputs are switching between CMOS levels of V
Static characteristics, nominal 5 V operation
10 %; T
Parameter
LOW-state input voltage
HIGH-state input voltage
LOW-state output voltage
HIGH-state output voltage
Power-down mode input current
on pin X1/SCLK
LOW-state input current on pin
X1/SCLK
HIGH-state input current on pin
X1/SCLK
input leakage current
HIGH off-state output current
LOW off-state output current
LOW off-state open-drain output
current
HIGH off-state open-drain
output current
supply current
amb
= 40 C to +85 C; unless otherwise specified.
L
= 85 pF, except interrupt outputs. Test conditions for interrupt outputs: C
Conditions
except pin X1/SCLK
pin X1/SCLK
I
except open-drain outputs;
I
V
operating mode; V
operating mode; V
V
3-state data bus; V
3-state data bus; V
V
V
CMOS input levels
Rev. 01 — 31 October 2005
OL
OH
I
I
I
I
input port and IACKN pins
all other pins
operating mode; f = 10 MHz
Power-down mode; f = 0 MHz
= 0 V to V
= 0 V to V
= 0 V
= V
= 4 mA
= 400 A
DD
DD
DD
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
I
I
I
I
= 0 V
= V
= V
= 0 V
DD
DD
DD
0.2 V and V
[2] [3]
DD
[2]
[2]
[2]
[2]
[4]
[4]
[5]
when they are at V
SS
Min
-
2.4
0.8V
-
V
0
-
-
-
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
+ 0.2 V.
1
30
10
1
5
10
DD
DD
L
0.5 -
= 85 pF, R
SC28L201
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
9
200
SS
[1]
L
. At V
= 2.7 k to V
Max
0.8
-
-
0.4
-
1
0
30
1
1
5
-
-
1
20
500
DD
they source
91 of 110
Unit
V
V
V
V
V
mA
A
A
A
A
A
A
A
A
A
A
DD
.

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