AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 143

• Manufacturer Part Number: AT90PWM3B
• Manufacturer: Atmel Corporation

Specifications of AT90PWM3B

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 1
• Pwm Channels: 12
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.8
16.8.1
16.8.2
4317J–AVR–08/10
PSC Inputs
PSC Retrigger Behaviour versus PSC running modes
Retrigger PSCOUTn0 On External Event
Each part A or B of PSC has its own system to take into account one PSC input. According to
PSC n Input A/B Control Register (see description
has a Retrigger or Fault input.
This system A or B is also configured by this PSC n Input A/B Control Register (PFRCnA/B).
Figure 16-14. PSC Input Module
In centered mode, Retrigger Inputs have no effect.
In two ramp or four ramp mode, Retrigger Inputs A or B cause the end of the corresponding
cycle A or B and the beginning of the following cycle B or A.
In one ramp mode, Retrigger Inputs A or B reset the current PSC counting to zero.
PSCOUTn0 ouput can be resetted before end of On-Time 0 on the change on PSCn Input A.
PSCn Input A can be configured to do not act or to act on level or edge modes. The polarity of
PSCn Input A is configurable thanks to a sense control block. PSCn Input A can be the Output of
the analog comparator or the PSCINn input.
As the period of the cycle decreases, the instantaneous frequency of the two outputs increases.
PSCINn
Analog
Comparator
n Output
PISELnA
(PISELnB)
0
1
PELEVnA /
(PELEVnB)
PRFMnA3:0
(PRFMnB3:0)
PCAEnA
(PCAEnB)
Digital
Filter
CLK
PSC
PAOCnA
(PAOCnB)
PFLTEnA
(PFLTEnB)
0
1
CLK
CLK
2
4
PSC
PSC
Input
Processing
(retriggering ...)
PSC Core
(Counter,
Waveform
Generator, ...)
16.25.14page
AT90PWM2/3/2B/3B
Output
Control
167), PSCnIN0/1 input can act
PSCOUTn0
(PSCOUTn1)
(PSCOUT22)
(PSCOUT23)
143