AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 58

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AT90PWM3B

Manufacturer Part Number
AT90PWM3B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90PWM3B

Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
1
Pwm Channels
12
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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58
AT90PWM2/3/2B/3B
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 2K bytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typical and
general program setup for the Reset and Interrupt Vector Addresses in AT90PWM2/2B/3/3B is:
When the BOOTRST Fuse is programmed and the Boot section size set to 2K bytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses in
AT90PWM2/2B/3/3B is:
0x010
0x011
0x012
0x013
0x014
0x015
0x016
0x017
0x018
0x019
0x01A
0x01B
0x01C
0x01F
;
0x020RESET:
0x021
0x022
0x023
0x024
0x025
Address Labels Code
0x000
0x001
0x002
0x003
0x004
0x005
;
.org 0xC01
0xC01
0xC02
...
0xC1F
Address Labels Code
.org 0x001
0x001
0x002
...
0x01F
...
RESET: ldi
...
out
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
ldi
out
ldi
sei
<instr>
out
ldi
out
sei
<instr>
rjmp
rjmp
...
rjmp
rjmp
rjmp
...
rjmp
...
SPL,r16
...
TIM0_COMPA
TIM0_OVF
ADC
EXT_INT1
SPI_STC
USART_RXC
USART_UDRE
USART_TXC
EXT_INT2
WDT
EE_RDY
TIM0_COMPB
EXT_INT3
SPM_RDY
r16, high(RAMEND); Main program start
SPH,r16
r16, low(RAMEND)
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
PSC2_CAPT
PSC2_EC
...
SPM_RDY
PSC2_CAPT
PSC2_EC
...
SPM_RDY
xxx
xxx
Comments
; Timer0 Compare A Handler
; Timer0 Overflow Handler
; ADC Conversion Complete Handler
; IRQ1 Handler
; SPI Transfer Complete Handler
; USART, RX Complete Handler
; USART, UDR Empty Handler
; USART, TX Complete Handler
; IRQ2 Handler
; Watchdog Timer Handler
; EEPROM Ready Handler
; Timer0 Compare B Handler
; IRQ3 Handler
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Set Stack Pointer to top of RAM
; Enable interrupts
; PSC2 Capture event Handler
; PSC2 End Cycle Handler
;
; Store Program Memory Ready Handler
; PSC2 Capture event Handler
; PSC2 End Cycle Handler
;
; Store Program Memory Ready Handler
4317J–AVR–08/10

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