AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 183
AT90PWM3B
Manufacturer Part Number
AT90PWM3B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM3B
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
1
Pwm Channels
12
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Company
Part Number
Manufacturer
Quantity
Price
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AT90PWM3B-16MU
Manufacturer:
ATMEL/爱特梅尔
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20 000
Company:
Part Number:
AT90PWM3B-16MUR
Manufacturer:
TI
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1 829
Company:
Part Number:
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Manufacturer:
Atmel
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4 000
Part Number:
AT90PWM3B-16SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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18. USART
18.1
18.2
4317J–AVR–08/10
Features
Overview
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a
highly flexible serial communication device. The main features are:
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A simplified block diagram of the USART Transmitter is shown in
I/O Registers and I/O pins are shown in bold.
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
USART Extended mode (EUSART) with:
– Independant bit number configuration for transmit and receive
– Supports Serial Frames with 5, 6, 7, 8, 9 or 13, 14, 15, 16, 17 Data Bits and 1 or 2 Stop Bits
– Biphase Manchester encode/decoder (for DALI Communications)
– Manchester framing error detection
– Bit ordering configuration (MSB or LSB first)
– Sleep mode exit under reception of EUSART frame
AT90PWM2/3/2B/3B
Figure
18-1. CPU accessible
183
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