AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 144
AT90PWM3B
Manufacturer Part Number
AT90PWM3B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM3B
Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
1
Pwm Channels
12
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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16.8.3
144
AT90PWM2/3/2B/3B
Retrigger PSCOUTn1 On External Event
Figure 16-15. PSCOUTn0 retriggered by PSCn Input A (Edge Retriggering)
Note:
Figure 16-16. PSCOUTn0 retriggered by PSCn Input A (Level Acting)
Note:
PSCOUTn1 ouput can be resetted before end of On-Time 1 on the change on PSCn Input B.
The polarity of PSCn Input B is configurable thanks to a sense control block. PSCn Input B can
be configured to do not act or to act on level or edge modes. PSCn Input B can be the Output of
the analog comparator or the PSCINn input.
As the period of the cycle decreases, the instantaneous frequency of the two outputs increases.
PSCOUTn0
PSCOUTn1
PSCn Input A
(falling edge)
PSCn Input A
(rising edge)
PSCOUTn0
PSCOUTn1
PSCn Input A
(high level)
PSCn Input A
(low level)
This exemple is given in “Input Mode 8” in “2 or 4 ramp mode” See Figure 16-31. for details.
This exemple is given in “Input Mode 1” in “2 or 4 ramp mode” See Figure 16-20. for details.
Dead-Time 0
Dead-Time 0
On-Time 0
On-Time 0
Dead-Time 1
On-Time 1
Dead-Time 1
On-Time 1
4317J–AVR–08/10
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