AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet - Page 261

• Manufacturer Part Number: AT90PWM3B
• Manufacturer: Atmel Corporation

Specifications of AT90PWM3B

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 1
• Pwm Channels: 12
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

22.4.2
22.4.2.1
22.4.2.2
4317J–AVR–08/10
Digital to Analog Converter input Register – DACH and DACL
DALA = 0
DALA = 1
Table 22-1.
• Bit 2 – DALA: Digital to Analog Left Adjust
Set this bit to left adjust the DAC input data.
Clear it to right adjust the DAC input data.
The DALA bit affects the configuration of the DAC data registers. Changing this bit affects the
DAC output on the next DACH writing.
• Bit 1 – DAOE: Digital to Analog Output Enable bit
Set this bit to output the conversion result on D2A,
Clear it to use the DAC internally.
• Bit 0 – DAEN: Digital to Analog Enable bit
Set this bit to enable the DAC,
Clear it to disable the DAC.
DACH and DACL registers contain the value to be converted into analog voltage.
Writing the DACL register forbid the update of the input value until DACH has not been written
too. So the normal way to write a 10-bit value in the DAC register is firstly to write DACL the
DACH.
In order to work easily with only 8 bits, there is the possibility to left adjust the input value. Like
this it is sufficient to write DACH to update the DAC value.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
DATS2
1
1
1
1
DATS1
0
0
1
1
DAC Auto Trigger source selection (Continued)
DAC7
DAC9
DAC1
R/W
R/W
R/W
R/W
7
0
0
7
0
0
-
DAC6
DAC8
DAC0
R/W
R/W
R/W
R/W
DATS0
0
1
0
1
6
0
0
6
0
0
-
DAC5
DAC7
R/W
R/W
R/W
R/W
5
0
0
5
0
0
-
-
Description
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
DAC4
DAC6
R/W
R/W
R/W
R/W
4
0
0
4
0
0
-
-
DAC3
DAC5
R/W
R/W
R/W
R/W
3
0
0
3
0
0
-
-
AT90PWM2/3/2B/3B
DAC2
DAC4
R/W
R/W
R/W
R/W
2
0
0
2
0
0
-
-
DAC9
DAC1
DAC3
R/W
R/W
R/W
R/W
1
0
0
1
0
0
-
DAC8
DAC0
DAC2
R/W
R/W
R/W
R/W
0
0
0
0
0
0
-
DACH
DACL
DACH
DACL
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