AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 140
AT90PWM81
Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM81
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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AT90PWM81
PSC n Input A Control Register – PFRCnA
PSC n Input B Control Register – PFRCnB
Table 12-20.
• Bit 5 – PBFMn0 : Balance Flank Width Modulation bit 0
Defines the Flank Width Modulation, together with PBFMn1 bit in PCNFEn register.
See
• Bit 4 – PAOCnB : PSC n Asynchronous Output Control B
When this bit is set, Fault input selected to block B can act directly to PSCOUTn1 and PSCOUT23 out-
puts. See Section “PSC Clock Sources”, page 132.
• Bit 3 – PAOCnA : PSC n Asynchronous Output Control A
When this bit is set, Fault input selected to block A can act directly to PSCOUTn0 and PSCOUT22 out-
puts. See Section “PSC Clock Sources”, page 132.
• Bit 2 – PARUNn : PSC n Autorun
When this bit is set, the PSC n starts with PSCn-1. That means that PSC n starts :
• Bit 1 – PCCYCn : PSC n Complete Cycle
When this bit is set, the PSC n completes the entire waveform cycle before halt operation requested by
clearing PRUNn. This bit is not relevant in slave mode (PARUNn = 1).
• Bit 0 – PRUNn : PSC n Run
Writing this bit to one starts the PSC n.
When set, this bit prevails over PARUNn bit.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PPREn1
0
1
1
• when PRUNn bit in PCTLn register is set,
• or when PARUNn bit in PCTLn is set and PRUNn-1 bit in PCTLn-1 register is set (or PARUN0 bit
and PRUN0).
Table 12-15 on page 137
7
PCAEnA
R/W
0
7
PCAEnB
R/W
0
PSC n Prescaler Selection
PPREn0
1
0
1
6
PISELnA0 PELEVnA0 PFLTEnA
R/W
0
6
PISELnB0 PELEVnB0 PFLTEnB
R/W
0
Description
Divide the PSC input clock by 4
Divide the PSC input clock by 16
Divide the PSC clock by 64
5
R/W
0
5
R/W
0
4
R/W
0
4
R/W
0
3
PRFMnA3 PRFMnA2 PRFMnA1 PRFMnA0 PFRCnA
0
3
PRFMnB3 PRFMnB2 PRFMnB1 PRFMnB0 PFRCnB
0
R/W
R/W
2
R/W
0
2
R/W
0
1
R/W
0
1
R/W
0
0
R/W
0
0
R/W
0
7734P–AVR–08/10
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