AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 50

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AT90PWM81

Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT90PWM81

Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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7.1.3
50
AT90PWM81
Power-on Reset
Figure 7-1.
Table 7-1.
Notes:
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level is defined
in
used to trigger the start-up Reset, as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on
Reset threshold voltage invokes the delay counter, which determines how long the device is kept in
RESET after V
below the detection level.
Symbol
Table
V
V
t
RST
POT
RST
BODLEVEL [2..0]
1. Values are guidelines only..
2. The Power-on Reset will not work unless the supply voltage has been below V
7-1. The POR is activated whenever V
Parameter
Power-on Reset Threshold Voltage
(rising)
Power-on Reset Threshold Voltage
(falling)
Minimum pulse width on RESET
Pin
RESET Pin Threshold Voltage
CC
Reset Logic
Reset Characteristics
rise. The RESET signal is activated again, without any delay, when V
(2)
Pull-up Resistor
Spike
Filter
RSTDIS
(1)
CKSEL[3:0]
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CC
is below the detection level. The POR circuit can be
Condition
CK
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
0.2Vcc
Min.
Typ.
400
1.4
1.3
TIMEOUT
POT
(falling)
0.85Vcc
7734P–AVR–08/10
Max.
2.3
2.3
CC
decreases
Units
ns
V
V
V

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