AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 221

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.8.4.2
17.8.5
17.8.6
17.9
7734P–AVR–08/10
Amplifier
Digital Input Disable Register 0 – DIDR0
Digital Input Disable Register 1– DIDR1
ADLAR = 1
• Bit 7:0 – ADC7D..ADC0D: AMP0-D and ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the ADC7..0 pin and the digital input from this pin is not needed, this bit should be written logic
one to reduce power consumption in the digital input buffer.
• Bit 2:0 – AMP0+D and ADC10:8 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to an analog pin and the digital input from this pin is not needed, this bit should be written logic
one to reduce power consumption in the digital input buffer.
The AT90PWM81 features one differential amplified channel with programmable 5, 10, 20, and 40 gain
stage. Despite the result is given by the 10 bit ADC, the amplifier has been sized to give a 8bits resolution.
The negative input on the amplifier can be internally switched to the analog ground. However, amplifier
characteristics are specified with differential inputs.
Because the amplifier is a switching capacitor amplifier, it needs to be clocked by a synchronization signal
called in this document the amplifier synchronization clock. The amplifier samples the input value at the
falling edge of the synchronization signal. This allow to measure analog signals with same period as the
synchronization. The maximum clock for the amplifier is 250kHz.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
7
ADC8D
AMP3D
R/W
0
7
-
-
0
7
ADC9
ADC1
R
R
0
0
6
ADC7D
AMP0-D
R/W
0
6
-
-
0
6
ADC8
ADC0
R
R
0
0
5
ADC5D
ACMP2D
R/W
0
5
-
R/W
0
5
ADC7
-
R
R
0
0
0
4
ADC4D
ACMP3MD
R/W
0
4
-
R/W
4
ADC6
-
R
R
0
0
3
ADC3D
ACMPMD
R/W
0
3
ACMP1MD AMP0+D
R/W
0
3
ADC5
-
R
R
0
0
2
ADC2D
ACMP2MD
R/W
0
2
R/W
0
2
ADC4
-
R
R
0
0
1
ADC1D
R/W
0
1
ADC10D
R/W
0
1
ADC3
-
R
R
0
0
AT90PWM81
0
ADC0D
ACMP1D
R/W
0
0
ADC9D
R/W
0
0
ADC2
-
R
R
0
0
DIDR0
DIDR1
ADCH
ADCL
221