ATmega32U2 Atmel Corporation, ATmega32U2 Datasheet - Page 51
ATmega32U2
Manufacturer Part Number
ATmega32U2
Description
Manufacturer
Atmel Corporation
Specifications of ATmega32U2
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
20
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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10.3
10.3.1
10.4
10.4.1
10.4.2
7799D–AVR–11/10
Internal Voltage Reference
Watchdog Timer
Voltage Reference Enable Signals and Start-up Time
Features
Overview
that remains enabled. This allows the device to stay attached to the bus during and after the
reset, while enhancing firmware reliability.
Figure 10-7. USB Reset During Operation
ATmega8U2/16U2/32U2 features an internal bandgap reference. This reference is used for
Brown-out Detection, and it can be used as an input to the Analog Comparator.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
reference is not always turned on. The reference is on during the following situations:
Thus, when the BOD is not enabled, after setting the ACBG bit, the user must always allow the
reference to start up before the output from the Analog Comparator is used. To reduce power
consumption in Power-down mode, the user can avoid the three conditions above to ensure that
the reference is turned off before entering Power-down mode.
•
•
•
•
ATmega8U2/16U2/32U2 has an Enhanced Watchdog Timer (WDT). The WDT is a timer count-
ing cycles of a separate on-chip 128 kHz oscillator. The WDT gives a early warning interrupt
1. When the BOD is enabled (by programming the BODLEVEL [2..0] Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
Clocked from separate On-chip Oscillator
3 Operating modes
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
Early warning after one Time-Out period reached, programmable Reset (see operating modes)
after 2 Time-Out periods reached.
– Interrupt
– System Reset
– Interrupt and System ResetSelectable Time-out period from 16ms to 8s
ACBG bit in ACSR).
DM
DP
CC
USB Traffic
“System and Reset Characteristics” on page
ATmega8U2/16U2/32U2
End of Reset
USB Traffic
267. To save power, the
51
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