ATmega32U2 Atmel Corporation, ATmega32U2 Datasheet - Page 78
ATmega32U2
Manufacturer Part Number
ATmega32U2
Description
Manufacturer
Atmel Corporation
Specifications of ATmega32U2
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
20
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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7799D–AVR–11/10
Reset, Reset input. External Reset input is active low and enabled by unprogramming ("1") the
RSTDISBL Fuse. Pullup is activated and output driver and digital input are deactivated when the
pin is used as the RESET pin.
dW, debugWire channel. When the debugWIRE Enable (DWEN) Fuse is programmed and Lock
bits are unprogrammed, the debugWIRE system within the target device is activated. The
RESET port pin is configured as a wired -AND (open-drain) bi-directional I/O pin with pull-up
enabled and becomes the communication gateway between the target and the emulator.
• XTAL2, Bit 0
XTAL2, Oscillator. The PC0 pin can serve as Inverting Output for internal Oscillator amplifier.
Table 12-7
shown in
Table 12-7.
Table 12-8.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Figure 12-5 on page
and
0
PC7/ICP1/INT4/CLK0
0
0
0
0
0
INT4 ENABLE
1
INT4 INPUT
–
Overriding Signals for Alternate Functions in PC7..PC4
Overriding Signals for Alternate Functions in PC2..PC0
PC2/PCINT11
0
0
0
0
0
0
PCINT11 ENABLE
1
PCINT11 INPUT
–
Table 12-8
relate the alternate functions of Port C to the overriding signals
72.
PC6/PCINT8/
OC1A
0
0
0
0
OC1A ENABLE
OC1A
PCINT8 ENABLE
1
PCINT8 INPUT
–
PC1/RESET/dW
0
0
0
0
0
0
0
0
–
–
ATmega8U2/16U2/32U2
PC5/PCINT9/
OC1B
0
0
0
0
OC1B ENABLE
OC1B
PCINT9 ENABLE
1
PCINT9 INPUT
–
PC0/XTAL2
0
0
0
0
0
0
0
0
–
–
PC4/PCINT10
0
0
0
0
0
0
PCINT10 ENABLE
1
PCINT10 INPUT
–
78
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